M29F800FB55N3E2

Produktübersicht

IC Picture

Bilder dienen nur der Illustration

Hersteller-Nummer M29F800FB55N3E2
Hersteller MICRON
Produktkategorie FLASH-NOR
IC-Code 29F800 BOTTOM

Produktbeschreibung

Gehäuse TSOP-48
Verpackung TRAY
RoHS RoHS
Spannungsversorgung 5.0 V
Betriebstemperatur -40 C~+125 C
Geschwindigkeit 55 NS
Standard Stückzahl
Abmessungen Karton

Description The following overview of the Numonyx® Axcell™ M29F 5 V Flash Memory device (M29W160F) refers to the 16-Mbit device. However, the information can also apply to lower densities of the M29F device. The M29F160F is a 16 Mbit (2 Mbit x8 or 1 Mbit x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (4.5 to 5.5 V) supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. The blocks in the memory are asymmetrically arranged, as shown in Figure 10.: Block Addresses, M29F160 (x8) and Figure 11.: Block Addresses, M29F160 (x16). The first or last 64 KBytes have been divided into four additional blocks. The 16 KByte Boot Block can be used for small initialization code to start the microprocessor, the two 8 KByte Parameter Blocks can be used for parameter storage and the remaining 32K is a small Main Block where the application may be stored. Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic. The memory is offered in TSOP48 (12 x 20mm), SO44 , and TFBGA48 (0.8 mm pitch) packages. The memory is supplied with all the bits erased (set to ’1’).

Verfügbare Angebote

Teilenummer Menge Datecode
M29F800FB55N3E2 2.745 Anfrage senden
M29F800FB55N3E2 15.424 Anfrage senden
M29F800FB55N3E2 20.463 Anfrage senden
M29F800FB55N3E2 20.395 Anfrage senden
M29F800FB55N3E2 20.506 Anfrage senden
M29F800FB55N3E2 21.520 Anfrage senden
M29F800FB55N3E2 22.034 Anfrage senden
M29F800FB55N3E2 23.197 Anfrage senden
M29F800FB55N3E2 22.496 Anfrage senden
M29F800FB55N3E2 576 18+ Anfrage senden

Cross Reference

Teilenummer Gehäuse Spannungsversorgung Geschwindigkeit Betriebstemperatur
M29F800FB55N3 TSOP-48 5.0 V 55 NS -40 C~+125 C
M29F800FB55N3F2 TSOP-48 5.0 V 55 NS -40 C~+125 C

FFFE (Form, Fit & Functional Equivalents)

Teilenummer Gehäuse Spannungsversorgung Geschwindigkeit Betriebstemperatur
M 29F800FB - 55N3E2 NUX TSOP-48 5.0 V 55 NS -40 C~+125 C
M29F800DB 55 N 3 TSOP-48 5.0 V 55 NS -40 C~+125 C