MT46H8M32LFB5-5:H

General Description The 256Mb Mobile DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 268,435,456 bits. It is internally configured as a quad-bank DRAM. Each of the x16’s 67,108,864-bit banks is organized as 8,192 rows by 512 columns by 16 bits. Each of the x32’s 67,108,864-bit banks is organized as 4,096 rows by 512 columns by 32 bits. In the reduced page-size option, each of the x32’s 67,108,864-bit banks is organized as 8,192 rows by 256 columns by 32 bits.