K4S643232HTC55/50/60
產品詳情
| 脚位/封装 | TSOP2(86) |
| 外包裝 | TRAY |
| 無鉛/環保 | 含鉛 |
| 電壓(伏) | 3.3 V |
| 溫度規格 | 0 C~+85 C |
| 速度 | 200 MHZ |
| 標準包裝數量 | |
| 標準外箱 | |
| Number Of Words | 2M |
| Bit Organization | x32 |
| Density | 64M |
| Internal Banks | 4 Banks |
| Generation | 9th Generation |
| Power | Normal Power |
GENERAL DESCRIPTION The K4S643232H is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clo ck cycle. Range of operating frequencies, programmable burs t length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
FFFE/互通料號 (形式，腳位和功能對等)
| IC 編號 | 脚位/封装 | 電壓(伏) | 速度 | 溫度規格 |
|---|---|---|---|---|
| IC42S32200/L-5T | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |
| IS42S32200L-5BC | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |
| IS42S32200L-5T | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |
| IS42S32200L-5TC | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |
| K4S643232C-TC50T00 | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |
| K4S643232CTC50 | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |
| K4S643232E-RC50 | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |
| K4S643232E-TC/L50 | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |
| K4S643232E-TC/TL50 | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |
| K4S643232E-TC45 | TSOP2(86) | 3.3 V | 200 MHZ | 0 C~+85 C |