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制造商IC编号 | H5TQ2G63DFR-H9C |
厂牌 | SK HYNIX/海力士 |
IC 类别 | DDR3 SDRAM |
IC代码 | 128MX16 DDR3 |
共通IC编号 | H5TQ2G63DFR-H9C (128X16 DDR3- |
H5TQ2G63DFR-H9C/PBC | |
H5TQ2G63DFR-H9C0 | |
H5TQ2G63DFR-H9CR |
脚位/封装 | FBGA-96 |
外包装 | TRAY |
无铅/环保 | 无铅/环保 |
电压(伏) | 1.5 V |
温度规格 | 0 C~+95 C |
速度 | 1333 MBPS |
标准包装数量 | |
标准外箱 | |
Number Of Words | 128M |
Bit Organization | x16 |
Density | 2G |
Operating Temperature | commercial temperature(0°C~85°C) & normal power |
Package Material | lead & halogen free(ROHS compliant) |
Hynix Memory | H |
Die Generation | 5th |
No Of Banks | 8 banks |
Product Family | DRAM |
Shipping Method | tray |
Description The H5TQ2G83DFR-xxC, H5TQ2G63DFR-xxC,H5TQ2G83DFR-xxI, H5TQ2G63DFR-xxI, H5TQ2G83DFRxxL,H5TQ2G63DFR-xxL,H5TQ2G83DFR-xxJ,H5TQ2G63DFR-xxJ are a 2,147,483,648-bit CMOS Double Data Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. SK Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the CK), Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high bandwidth.
IC 编号 | 脚位/封装 | 电压(伏) | 速度 | 温度规格 |
---|---|---|---|---|
H5TQ2G63B/DFR-H9C | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |
H5TQ2G63BFR-H9C | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |
H5TQ2G63BFR-H9C-C | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |
H5TQ2G63DFR-PBC/H9C | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |
H5TQ2G63EFR-H9C | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |
H5TQ2G63FFR-H9C | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |
H5TQ2G63FFR-H9C/PBC | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |
H5TQ2G63GFR-H9C | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |
NT5CB128M16BP-CG | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |
NT5CB128M16BP-CG: | FBGA-96 | 1.5 V | 1333 MBPS | 0 C~+95 C |